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List of Handouts Used in Lectures
This page is maintained by
Steve Norman
Last modified: Sun Apr 11 17:50:08 MDT 2010
I am not going to post lecture notes -- just electronic versions
of the handouts I may bring to lectures from time to time.
- Tue, Jan 10 (PDF format).
This document is incomplete--students were supposed to mark it
up to show where addresses and data were flowing as instructions
got executed.
- Thu, Jan 28 (PDF format).
Front page has diagrams showing SPIM memory address space organization.
Back page
has an example of solving the a-register conflict problem
by copying incoming arguments to s-registers.
- Tue, Feb 2 (PDF format).
Front page
has an example of solving the a-register conflict problem
by copying incoming arguments to stack slots.
Back page has an example of putting local variables in memory
within a stack frame.
- Thu, Feb 25 (PDF format).
Integer Addition and Subtraction, Overflow and Wraparound.
- Thu, Mar 4 (PDF format).
Floating-Point Format Examples.
- Tue, Mar 9 (PDF format).
Some Data and Remarks about Speed of Arithmetic.
- Thu, Mar 11. Figure 4.9 from the textbook.
I don't have permission to post this on the Web.
- Tue, Mar 16. Figures 4.10 and 4.17 from the textbook.
I don't have permission to post this on the Web.
- Thu, Mar 18 (PDF format).
Partial Notes on Pipelining.
- Tue, Mar 23 (PDF format).
Page 1 is on solutions to control hazards.
Page 2 has to do with the pipelined processor
of textbook Figure 4.46.
- Thu, Mar 25 (PDF format).
Has some MIPS assembly-language fragments used as
examples of data hazards and control hazards managed
by hardware introduced in Sections 4.7 and 4.8 of the
textbook.
- Tue, Mar 31 (two handouts):
Brief Notes on Instruction-Level
Parallelism
and Introduction
to Memory Organization.
- Thu, Apr 1. Figures 5.7, 5.9, and 5.17 from the textbook.
I don't have permission to post this on the Web.
- Tue, Apr 6 (PDF format).
Virtual Memory: The Big Picture
- Thu, Apr 8 (PDF format).
Information about TLB organization and TLB miss handling.
Also presents a memory system performance example
related to reading all elements in a large
two-dimensional array.